The present disclosure relates generally to the fabrication of semiconductor devices, and more particularly, to a method for removing a spacer used to define the lightly doped drain (LDD) regions in Metal Oxide Semiconductor Field Effect Transistor (MOSFET) fabrication.
Semiconductor device geometries have dramatically decreased in size since such devices were first introduced several decades ago. Since then, integrated circuits have generally followed the two year/half-size rule (often called Moore""s Law), which means that the number of devices on a chip doubles every two years. Today""s fabrication plants are routinely producing devices having 0.35 xcexcm and even 90 nm feature sizes or smaller. As geometries shrink, semiconductor manufacturing methods often must be improved.
Traditional methods for fabricating the MOSFETs used in integrated circuit structures are becoming inadequate as device size shrinks. Conventional MOSFET fabrication utilizes a technique of building material spacers to help control and define the implantation of dopants in the source and drain regions of the MOSFET. One way to control the implantation of dopants is by using an LDD region in a semiconductor substrate between the channel region (e.g., the region of the substrate beneath a gate electrode and a gate oxide) and the more heavily doped source and drain regions. This LDD region between the channel and the more heavily doped conventional drain region reduces the electric field thereby mitigating short-channel effects, reducing hot-carrier generation, and increasing the junction breakdown voltage. The LDD region provides a gradual transition from the drain and/or source to the gate region. This transition area disburses any abrupt voltage changes and reduces the maximum electric field strength. A discussion of the LDD region may be found in S. Wolf, Silicon Processing for the VLSI Era 348 (Vol. 2, Lattice Press 1990).
Spacers are often used in the fabrication of LDD regions to facilitate the different levels of doping for the drain/source regions and the LDD regions. The LDD region can be controlled by the lateral spacer dimension and the thermal drive cycle, and can be independent from the source and drain implant depth. However, removing the spacer is critical because removal can damage adjacent structures, such as the gate and the underlying silicon substrate. This difficulty is exacerbated during the LDD formation process which can produce a hard polymer layer on top of the spacer, making its removal more difficult.
Other difficulties must also be considered. Layer thickness decreases and sensitivity to heat exposure (the thermal budget) needed to provide annealing and activation of dopants become critical as device geometries decrease. Also, transient enhanced diffusion (TED) can cause the LDD region to undesirably extend in both vertical and horizontal directions during the formation of such items as sidewall spacers. As device geometries shrink, the harmful effects of TED have become a greater problem, prompting efforts to eliminate any spacer made during the semiconductor fabrication.
Provided is a new and improved method and system for removing a spacer, such as associated with a processing operation using a lightly doped drain (LDD) region. In one embodiment, the method includes defining an electrode on a substrate, forming a spacer adjacent to at least one sidewall of the electrode, and performing a processing operation on the substrate. The processing operation, which can be an ion implantation process, can use the spacer as a mask, and as a result can create a layer, such as a polymer, on the spacer. The spacer can then be removed by applying a first dry etch process to remove the layer on the spacer and a second wet etch process to remove the spacer. In some embodiments, the first dry etch utilizes a fluorine-contained plasma, such as one that uses a CF4, CHF3, CH2F2, or CH3F etchant. In some embodiments, a third wet etch process can be used to remove an oxide layer underlying the spacer.
In another embodiment, a semiconductor device having a lightly doped region is provided. The semiconductor device includes an electrode formed on a substrate, and first and second regions in the substrate that are spaced from the electrode. The first region is relatively deep and spaced a first distance from the electrode, and the second region is relatively shallow and spaced a second distance from the electrode, the second distance being less than the first. The second region is produced through use of a disposable spacer positioned adjacent to a side wall of the electrode, where the silicon substrate remains undamaged by a phosphoric acid process used to remove the spacer.
In another embodiment, a system is provided for fabricating a lightly doped drain (LDD) region on a semiconductor substrate. The system includes means for creating a spacer and a first means for implanting a first relatively heavily doped region with the spacer in place. The system also includes one or more chambers for removing the spacer, the one or more chambers configured for applying a first dry process to remove the layer on the spacer, the first dry process utilizing a fluorine-contained plasma and applying a second wet etch process to remove the spacer. The system further includes a second means for implanting the LDD region with the spacer removed.
In some embodiments, the one or more chambers for removing the spacer is further configured for applying a third wet etch process to remove an oxide layer underlying the spacer.